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CSE261 – Digital Logic Design - Spring 2008 Syracuse University L.C. Smith
College Engineering and Computer Science
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Description
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CSE261: Digital Logic Design. 3 Y. Number representations,
Boolean algebra, logic minimization, memory circuits, counters, state
diagrams, state machine design, arithmetic circuits, and asynchronous
circuits. Logic simulators will be used to demonstrate and provide students
with design activities. |
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Instructor
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Office: CST 4-297. Email: eercanli@syr.edu. Phone: 443-3564. Hours: T TH 11:30am - 1:30pm. |
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TA
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Karthik Narayanan. Email: ksankara@syr.edu. Office: CST 3-120.
Office Hours: W 9:30-10:30am; Th
3:30-4:30pm. |
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Times
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MWF 11:40am – 12:35pm at Link 105. |
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Recitations
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T
8:00 am – 8:55 am at Link 114 W
8:25 am – 9:20 am at Link 103 TH 8:25 am – 9:20 am at CST 3-216 |
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Textbook
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JF Wakerly, Digital Design Principles and Practices, Fourth Edition, Prentice Hall, 2006.
ISBN: 0-13-186389-4. |
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Grading
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Homework
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Homework assignments are to be submitted in lecture on the
assigned due date. No late assignments will be accepted. You are expected to
complete the homework individually. However, you can discuss assignments and
solutions with each other, but all work submitted must be the sole work of
the author. Course projects will be completed individually or in-groups of
two. Answers to selected problems will be available on the class web page. |
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Exams
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All exams must be taken at the scheduled time unless a previous
arrangement (with a good reason) has been made with the instructor. |
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WWW
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Our class web page will be updated frequently with lecture
slides (when possible), homework assignments and solutions, and tests and
solutions, and more interesting stuff. |
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Attendance
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You are expected to attend each class punctually and remain for
the entire class period; tardiness disturbs everyone. You need to inform the
instructor in advance if you expect to miss a class or leave the course
before the end of the semester. If you miss class your absence will be
excused by the instructor only if a doctor's certificate or other evidence is
submitted. If you have been absent and fail to submit an excuse to the
instructor, your absence will be considered unexcused. Even if your absence
is excused, you remain responsible for the work associated with the class you
missed. There will be a number of
unannounced pop quizzes. |
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Academic
Honesty
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Cheating in any form is not tolerated, nor is assisting another
person to cheat. The submission of any work by a student is taken as a
guarantee that the thoughts and expressions in it are the student's own
except when properly credited to another. Violations of this principle include giving or receiving aid in
an exam or where otherwise prohibited, fraud, plagiarism, the falsification
or forgery of any record, and any other deceptive act in connection with
academic work. Plagiarism is the representation of another's words, ideas,
programs, formulae, options, or other products of work as one's own, either
overtly or by failing to attribute them to their true source. Always protect your own work from others, since it is often not
possible to determine who the originator or the copier was. Such offense will
result in a failing grade ‘F’ and a letter of reprimand in your
permanent student file. |
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Course
Outline
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This course is to provide a first course in digital
systems. It covers topics in switching
algebra and design of combinational systems, description and analysis of gate
networks, design of two level and multilevel gate networks, sequential
systems: specifications and building sequential networks using standard
combinational and sequential components. Number Systems and
Codes: Binary, Octal, and Hex
Radices. Addition, Subtraction. Conversion between Radices. Two's Complement
Addition and Subtraction. Other Codes - BCD, Gray, Character. Introduction to
CMOS logic circuits. Digital Electronics: CMOS Logic Structure. CMOS Behavior -
Steady-state and Dynamic. CMOS Input and Output Structure. CMOS Logic
Families. Combinational
Logic Design Principles:
Switching Algebra. Combinational Circuit Analysis. Combinational Circuit
Synthesis and Minimization. Karnaugh Maps. Timing
Hazards. Combinational
Logic Design Practices:
Drawing Standards. Decoders. Three-State Buffers. Encoders. Multiplexers.
Exclusive OR. Comparators. Adders, Subtractors, and
ALUs. Introduction
to Sequential Logic Design: S-R, J-K, D and T flip-flops, master slave configuration,
Latches. Analysis of State Machine, state tables, state minimization, state
assignment, and synthesis. High-Level
Digital Design: Instruction Sets
and Organization of Simple Computers. Testability, Reliability and
Verification. Large-Scale Digital Systems. Computer-Aided Design
Automation Tools (Synopsys, FPGA, and VHDL tools). |
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