CSE 773: Formal Specification and Verification of Hardware

Course Description

This course teaches the theory, practice, and tools for using higher-order logic as a means for describing, designing, and verifying computer systems.

Prerequisites

CSE 561, CSE 607

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Time and Location

451 Link Hall

MW, 5:30pm - 6:50pm

Instructors:

Professor Shiu-Kai Chin, 255 Link Hall, x-3776, email: chin@cat.syr.edu

Office Hours: TBD

Grading Assistant: Sangmi Lee, slee@top.cis.syr.edu

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Course Details

Goals and Policies

Course Material

Course Schedule

References on the network

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Assignments and Exercises

Homework Assignments

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report.tex shows the latex file for a sample project report. The postscript file report.ps shows what it looks like. The latex macro file thol.tex converts HOL formulas into latex.

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